My primary research interests cover the many challenges involved in generating device structures and evaluating the current transport behaviour in the nanometer regime. Additionally, I am interested in devising and analysing novel device operation concepts. In the following, I discuss my current and most important research topics.
Electronic devices are consistently moving towards smaller feature scales, which gives rise not only to today’s non-planar devices, such as FinFETs and nanowire array FETs, but also to novel future device concepts based on, e.g., entangletronics. However, in order to be able to accurately model such devices operating at the nanoscale, precise knowledge of the device geometry is required due to a critical dependence of the current transport behavior on the device structure. Present fabrication technologies, however, introduce geometrical variations into the generated device structures due to the many challenges involved, which, however, must be correctly predicted.
From the diverse set of challenges in structure generation, I particularly focus on plasma etching of high aspect ratio structures, ion implantation, annealing, and oxidation processes.
Quantum Device Simulation
Once fabricated, the current transport behavior must be evaluated to determine the device’s electrical characteristics. Due to the nanometer-sized geometries, quantum mechanical effects emerge which must additionally be considered.
An attractive new approach to model future nanoelectronic devices is based on solving the Wigner-Boltzmann equation. Both stochastic and deterministic methods have been applied to solve the one-dimensional Wigner equation. However, only the Wigner Monte Carlo method, using the signed-particle technique, has made two-dimensional Wigner simulations viable thus far.
This approach is key to developing novel device concepts for the emerging field of entangletronics, which is short for entangled electronics. Entangletronics is a novel discipline based on coherence, interference, and entanglement, ultimately allowing to specifically engineer the current transport of devices in the nanometer regime. Within this context, I investigate novel device operation concepts based on simulation based analyses. The simulations are based on the ViennaWD simulation package of which I additionally oversee the overall development.
High Performance Computational Methods
However, accurately describing the device fabrication and the quantum current transport introduces the need for increasingly complex modeling and simulation approaches. This translates into massively increased simulation times, which – if left untreated – would severely limit the high pace of research in microelectronics.
Therefore, an all-encompassing aspect to all areas I investigate is the need to utilise high performance computing resources. Therefore, I am interested in utilizing such resources, i.e., supercomputers (like the VSC-3 in Vienna) as well as multi-core workstations and many-core accelerators and co-processors. To that end I investigate and develop algorithms, data structures, and simulators using shared-memory parallelization techniques (e.g. OpenMP) as well as distributed–memory (e.g. MPI), and accelerator approaches (e.g. CUDA).