Research and Publications

My primary research interests are summarized below (see my publications for more details).

High Performance Computational Methods

Accurately describing the device fabrication and the quantum current transport introduces the need for increasingly complex modeling and simulation approaches. This translates into massively increased simulation times, which – if left untreated – would severely limit the high pace of research in microelectronics.vsc_3_scaled Therefore, an all-encompassing aspect to all areas I investigate is the need to utilize high performance  computing resources. Therefore, I am interested in utilizing such resources, i.e., supercomputers such as the VSC systems in Vienna as well as multi-core workstations and many-core accelerators and co-processors. To that end I investigate and develop algorithms, data structures, and simulators using shared-memory parallelization techniques (e.g. OpenMP) as well as distributedmemory (e.g. MPI), and accelerator approaches (e.g. CUDA).

Structure Generation

Electronic devices are consistently moving towards smaller feature scales, which gives rise not only to today’s non-planar devices, such as FinFETs and nanowire array FETs, but also to novel future device concepts based on, e.g., entangletronics. However, in order to be able to accurately model such devices operating at the nanoscale, precise knowledge of the device geometry is required due to a critical dependence of the current transport behavior on the device structure. Present fabrication technologies, however, introduce geometrical variations into the generated device structures due to the many challenges involved, which, however, must be correctly predicted. 

Quantum Device Simulation

Cutting-edge nanoelectronic devices introduce quantum mechanical effects to the electron transport, which must be considered for a correct description. An attractive approach to model future nanoelectronic devices is based on solving the Wigner transport equation. I am focusing on particle Wigner approaches, which allow for a particular intuitive description and higher-dimensional simulation scenarios.

Process TCAD

The modeling and simulation of topography-changing semiconductor processing steps (e.g., deposition and etching) requires efficient numerical approaches to realize practically relevant simulations. I particularly focus on the computationally challenging tasks of (i) flux calculations by developing new algorithms for ray-tracing and surface sampling and (ii) hierarchical grid algorithms to accelerate the underlying level-set methods (e.g., parallel fast marching methods and feature detection).

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